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WP4 outcomes

  /  WP4 outcomes
EXCEED-European-system-on-chip-supply-chain

Workpackage 4

Workpackage 4 is to prepare an architecture definition.

D4.1 – Subsystem Requirements Allocation

This deliverable is confidential to the Consortium members and European Defence Agency as funder of the project.

The main objective of this deliverable is to describe the initial specification of the EXCEED SoC and SiP

architectures. It provides information on:

Methodology: The section describes the methodology adopted in this context to derive the specifications of the SoC, taking into consideration the state of the art of heterogeneous fully programmable SoCs, input requirements from Task 3.1 (Requirements’ specifications) and constraints in terms of technology, costs and risks.

SoC/SiP state of the art analysis: A detailed description of the SoC state of the art is provided, where a quantitative comparison of the main commercial fully-programmable SoC devices for military market is provided.

EXCEED SoC architecture specification: it describes the specifications of the SoC with details on the on-chip communication, general-purpose and real-time performance, modularity and scalability of the SoC and the FPGA fabric, power efficiency and low-power features, user perspective security services and compatibility with standard soldiers interfaces.

 

D4.2 – Subsystem Requirements Allocation

This deliverable is confidential to the Consortium members and European Defence Agency as funder of the project.

The purpose of the deliverable D4.2 – Subsystem Interfaces Description, second deliverable of WP4 (architectural specification) is to describe an advanced specification of the EXCEED SoC, following the high-level specifications provided in deliverable D4.1 – System Architecture and User Interfaces.

More specifically deliverable D4.2 focuses on a detailed description of the sub-blocks identified in the system architecture presented in deliverable D4.1. For each sub-block, it provides details on its features, interfaces, architecture, micro-architecture, main features, and software/firmware components.

 

D4.3 – Subsystem Requirements Allocation

This deliverable is confidential to the Consortium members and European Defence Agency as funder of the project.

The purpose of Deliverable 4.3 – Subsystem Requirements Allocation, the third deliverable from WP4 (architectural specifications) is to map the EXCEED SoC/SiP architectural requirements, collected in the perimeter of the activities of task Task 3.1 – Requirements Specification into the subsystem blocks of the EXCEED SoC/SiP architecture.

Therefore, this deliverable is linked to both architectural deliverables Deliverable 4.1 – System Architecture and User Interfaces and 4.2 –  Subsystem Interfaces Description and to the requirements collection deliverable Deliverable 3.1 – Requirements Specification.

More specifically, Deliverable 4.1 provides a high-level specification of the EXCEED SoC, detailing the main characteristics in terms of SoC/SiP architectures. Moreover, it provides the guidelines for a detailed description of the subsystem blocks treated in Deliverable 4.2 which is a description of hardware, software and interface components of the various blocks of the architectural subsystems.

On the other hand, the Deliverable 3.1 provides a detailed collection of the SoC/SiP requirements including the analysis outcomes of use cases for defence applications proposed by the OEM partners in the EXCEED project.

The goal of Deliverable D4.3 is to map the requirements of different hardware and software components of the EXCEED SoC/SiP into its architectural blocks and sub-blocks.

 

D4.4 – Test Environment Architecture

This deliverable is confidential to the Consortium members and European Defence Agency as funder of the project.

The main goal of Deliverable 4.4 – Test Environment Architecture, the fourth deliverable from WP4 (architectural specifications), is to provide a description of the test environment architecture required to support the verification plan described in Deliverable 3.2 – Test plan on top of the definition of the evaluation board requirements described in Deliverable 3.3 – Evaluation Board Functional Blocks Report.

Task 4.4 – Test environment architecture related to this deliverable has strong interactions both with Task 3.2 – Validation Plan and Task 3.3 – Definition of evaluation board requirements and specifications.

More specifically, the deliverable is structured as follows:

  1. First section describes the content and objective of the deliverable, including the methodology adopted to carry out the activities of the related task and a detailed analysis of its positioning with respect to the other work packages and tasks of the project.
  2. Then following section describes the test environment architecture. In particular it describes the hardware part, i.e. all the hardware (HW) components required to support the validation plan, as well as its software (SW) components along with the related firmware parts (FW).
  3. The last version cross-checks that all the components of the EXCEED SoC architecture selected in the test plan to be tested are covered by the test architecture environment components (i.e., hardware, software and firmware items).